@KTzone » 優惠 - 私人交易 » [大學奪A筆記]Logic Circuit Design (ELECTRONIC ENGINEERING必修科)


2011-12-10 14:32 philip206
[大學奪A筆記]Logic Circuit Design (ELECTRONIC ENGINEERING必修科)

[b][font=Arial][size=4][color=#9932cc]城大ELECTRONIC ENGINEERING必修科: [/color][/size][size=5][color=#ff00ff]Logic Circuit Design[/color][/size][/font][/b][color=#9932cc]
[/color][font=Arial][size=4][color=#9932cc][b]有LECTURE NOTES,TUTORIAL PROBLEMS 同DETAILED SOLUTION

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[/font][size=4][color=#9932cc][b][font=新細明體]筆記非常有用,本人於此科奪得[color=#ff0000]A[/color][/font][/b][/color][/size]
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[b][size=4]Syllabus:
[/size][/b][size=4][color=#0000ff][u]Number Systems and Arithmetic
[/u]Number systems and conversion between different radix systems; BCD codes and weighted codes; Complement of binary numbers and signed number representations; Binary arithmetic; Gray codes and ASCII codes; Parity and error correction.[/color][/size]
[u][size=4][color=#0000ff]Boolean Functions and Logic Gates
[/color][/size][/u][size=4][color=#0000ff]Boolean algebra and Boolean identities; Uniary and binary logic operations; De Morgan's laws; Min-term and max-term canonical forms; Sum of products and products of sums; Basic Logic gates.[/color]

[/size][u][size=4][color=#2e8b57][b]Combinational logic design
[/b][/color][/size][/u][size=4][color=#2e8b57][b]Gate minimization using Boolean algebra, Karnaugh map and Quine-McCluskey method; Don’t-care cases; Two level logic circuits and one gate type circuits; timing parameters and circuit hazard.[/b][/color][/size][size=4]
[/size][size=4][color=#9932cc][b][u]Combinational Function Blocks
[/u]Adders and subtractors; Comparators; Decoders and encoders; Multiplexers and Demultiplexers; Programmable logic devices.[/b][/color][/size]

[size=4][color=#9932cc][b][u]Flip-flops
[/u]Latches, RS, D-type, and master-slave JK flip-flops; Triggering and setting; Timing parameters.[/b][/color][/size]

[size=4][color=#9932cc][b][u]Synchronous Sequential Logic Circuit
[/u]Concept of states; Mealey and Moore machines; Redundant state elimination; Sequential digital system analysis and design; Design with programmable logic device. [/b][/color][/size]
[size=4][color=#9932cc][b][u]Registers and Counter
[/u]Various types of registers and counters; Counters, ripple and synchronous, and applications; Construction of registers and counters.[/b][/color][/size]

[size=4][color=#9932cc][b][u]Logic Families
[/u]Introduction to electrical characteristics of TTL, CMOS and ECL Logic Families; General concept of transfer characteristics, operating points and noise margins; fan-in and fan-out; Comparison of families; Interfacing between different families.[/b][/color][/size]


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[color=#00ff00][b][color=red][size=5][font=新細明體]全套NOTES $280有售,[/font][/size][/color][/b][/color][/size][/font]

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[[i] 本帖最後由 philip206 於 2011-12-10 15:00 編輯 [/i]]

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